https://jaehun.me/en/tags/long-context-decoding/Recent content in Long-Context Decoding on Jaehun's BlogHugoen-USTue, 08 Sep 2026 13:42:29 +0000https://jaehun.me/en/posts/paper-review-hardware-efficient-attention-for-fast-decoding/Thu, 23 Oct 2025 00:00:00 +0900https://jaehun.me/en/posts/paper-review-hardware-efficient-attention-for-fast-decoding/<p><a href="https://arxiv.org/abs/2505.21487v1"target="_blank" class="inline-flex items-center gap-1" >Paper<svg class="h-3 w-3 flex-shrink-0" id="external-link" xmlns="http://www.w3.org/2000/svg" viewBox="0 0 24 24"><path fill="none" stroke="currentColor" stroke-linecap="round" stroke-linejoin="round" stroke-width="2" d="M15 3h6v6m-11 5L21 3m-3 10v6a2 2 0 0 1-2 2H5a2 2 0 0 1-2-2V8a2 2 0 0 1 2-2h6"/></svg> </a></p> <h2 id="gta--gla-hardware-efficient-attention-that-breaks-the-memory-dominated-decode">GTA &amp; GLA: Hardware-Efficient Attention That Breaks the &lsquo;Memory-Dominated&rsquo; Decode<a href="#gta--gla-hardware-efficient-attention-that-breaks-the-memory-dominated-decode" class="heading-anchor" aria-label="Link to this section"><svg class="h-4 w-4" aria-hidden="true" xmlns="http://www.w3.org/2000/svg" viewBox="0 0 24 24"><g fill="none" stroke="currentColor" stroke-linecap="round" stroke-linejoin="round" stroke-width="2"><path d="M10 13a5 5 0 0 0 7.54.54l3-3a5 5 0 0 0-7.07-7.07l-1.72 1.71"/><path d="M14 11a5 5 0 0 0-7.54-.54l-3 3a5 5 0 0 0 7.07 7.07l1.71-1.71"/></g></svg></a></h2><h2 id="tldr">TL;DR<a href="#tldr" class="heading-anchor" aria-label="Link to this section"><svg class="h-4 w-4" aria-hidden="true" xmlns="http://www.w3.org/2000/svg" viewBox="0 0 24 24"><g fill="none" stroke="currentColor" stroke-linecap="round" stroke-linejoin="round" stroke-width="2"><path d="M10 13a5 5 0 0 0 7.54.54l3-3a5 5 0 0 0-7.07-7.07l-1.72 1.71"/><path d="M14 11a5 5 0 0 0-7.54-.54l-3 3a5 5 0 0 0 7.07 7.07l1.71-1.71"/></g></svg></a></h2><p><strong>GTA (key–value tying) and GLA (latent head sharding)</strong> raise <strong>FLOPs/byte</strong> and shrink the <strong>per-GPU KV cache</strong>, achieving <strong>1.2–2× kernel speedups</strong>, <strong>sharply lower serving latency</strong>, and <strong>up to 2× higher throughput</strong> — <strong>without quality loss</strong> (source: §Abstract, Fig.4–5, Fig.15, Tab.38–41).</p>